The present invention relates to a nonvolatile memory device, and more particularly, to a nonvolatile memory device capable of accurately measuring time necessary for a program operation, and a method for operating the same.
In the case of nonvolatile memory devices having a relatively long program time or verification scheme, it is difficult to predict a program time because the program time varies in a wide range, as opposed to volatile memory devices such as DRAM. The program operation is to record data in memory cells, and the verification scheme is to verify whether a program is successfully recorded in memory cells.
Nonvolatile memory devices having a relatively long program time of micro second (μs) use a status flag for detecting a program end time. When a memory controller requests a status flag to a memory, the memory responds to the request to send a status flag corresponding to an internal routine status. In this way, it is confirmed whether the program operation inside the nonvolatile memory device is completed.
FIG. 1 is a timing diagram explaining a procedure of confirming whether a program operation is completed in a conventional nonvolatile memory device.
In FIG. 1, CE# is a chip enable signal that is activated to a low level, OE# is a data output enable signal that is activated to a low level when data is outputted from a memory chip. WE# is a data input enable signal that is activated to a low level when data is inputted to a memory chip. ADDR and DQ are an address pin and a data pin, respectively. PGM is a signal that is internally activated during a program operation.
Referring to FIG. 1, a program command is applied. To be specific, the program command is applied through an address pin ADDR and a data pin DQ for three cycles. That is, the first three signals 555h, 2AAh and 555h inputted through the address pin ADDR, and the first three signals AAh, 55h and A0h inputted through the data pin DQ are the program command. After the application of the program command, an address PA designating a memory cell to be programmed is inputted through the address pin ADDR, and data PD corresponding to the inputted address PA is inputted through the data pin DQ in synchronization with a data input enable signal WE#. When the address PA and the data PD are inputted, the memory device begins to perform a program operation to record the data PD in the memory cell designated by the address PA. In FIG. 1, a signal PGM is internally activated to a high level during the program operation. The data PD is recorded while the signal PGM is kept at the high level.
To confirm whether the program operation is completed, a status address STATUS_ADDR is inputted through the address pin ADDR. That is, the status address STATUS_ADDR is inputted for confirming whether the program operation inside the memory is completed. The memory outputs a status flag STATUS_FLAG through the data pin DQ in response to the input of the status address STATUS_ADDR. The status flag STATUS_FLAG contains information about whether the program operation inside the memory is completed. Since the program operation inside the memory is not completed while the first status flag STATUS_FLAG1 in FIG. 1 is being outputted, the first status flag STATUS_FLAG1 contains information indicating that the program operation is not completed. On the other hand, since the program operation is completed at the time when the second status flag STATUS_FLAG2 corresponding to the second status address STATUS_ADDR2 is outputted, the second status flag STATUS_FLAG2 contains information indicating that the program operation is completed.
According to the above-mentioned method, it is difficult to extract the accurate program time in a nonvolatile memory test. An approach to detecting the program time is to continuously request the status flag STATUS_FLAG and find a position where the value of the status flag STATUS_FLAG changes. Information that can be obtained by requesting the status flag STATUS_FLAG is merely information about whether the program operation inside the memory is completed. Hence, it is difficult to detect the exact time when the program is completed. In the case of FIG. 1, by requesting the status flag two times, it can be known that the program operation has been completed at the time between the request of the first status flag STATUS_FLAG1 and the request of the second status flag STATUS_FLAG2. However, it is difficult to detect the exact/accurate program end time in the duration 101 between two time points.